K MIPS-ish Assembly Language Reference
Show Full K MIPS Subset
Registers
R0 - R31
See official MIPS names for 32 registers
Arithmetic Instructions
Name
Format
Example
add
add destReg, srcReg1, srcReg2
add R3, R1, R2
(R3 = R1 + R2)
addu
addu destReg, srcReg1, srcReg2
addu R3, R1, R2
(R3 = R1 + R2)
sub
sub destReg, srcReg1, srcReg2
sub R3, R1, R2
(R3 = R1 - R2)
subu
subu destReg, srcReg1, srcReg2
subu R3, R1, R2
(R3 = R1 - R2)
addi
addi destReg, srcReg, numericValue
addi R3, R1, 100
(R3 = R1 + 100)
addiu
addiu destReg, srcReg, numericValue
addiu R3, R1, 100
(R3 = R1 + 100)
Logical Instructions
Name
Format
Example
and
and destReg, srcReg1, srcReg2
and R3, R1, R2
(R3 = R1 bit-wise AND R2)
or
or destReg, srcReg1, srcReg2
or R3, R1, R2
(R3 = R1 bit-wise OR R2)
nor
nor destReg, srcReg1, srcReg2
nor R3, R1, R2
(R3 = R1 bit-wise NOR R2)
andi
andi destReg, srcReg1, immed
andi R3, R1, 4
(R3 = R1 bit-wise AND 00...0100)
ori
ori destReg, srcReg1, immed
ori R3, R1, 4
(R3 = R1 bit-wise OR 00...0100)
Moving and Shifting Instructions
Name
Format
Example
init (in memory)
init numericVal memAddr
init 42 M28
(initialize M28 to 42; 42 → M28)
load (from memory)
load valReg memAddr
load R1, M28
(load value at M28 into R1; R1 ← M28)
store (to memory)
store valReg memAddr
store R1, M28
(store value in R1 out to M28; R1 → M28)
lw (load word)
lw valReg offsetAmount(memAddrReg)
lw R1, 100(R2)
(load value at R2+100 into R1)
sw (store word)
sw valReg offsetAmount(memAddrReg)
sw R1, 100(R2)
(store value in R1 out to R2+100)
copy (reg to reg)
copy srcReg destReg
copy R1, R2
(copy value in R1 to R2)
sll (shift bits left)
sll destReg, srcReg1, shiftAmount
sll R3, R1, 4
(R3 = R1 shifted left 4 bits)
srl (shift bits right)
srl destReg, srcReg1, shiftAmount
srl R3, R1, 4
(R3 = R1 shifted right 4 bits)
lui (load upper immed)
lui reg immed
lui R1, 100
(load 100 into upper 16 bits of R1)
Branch-Related Instructions
Name
Format
Example
beq (branch if equal)
beq reg1, reg2, label
beq R1, R2, EndLoop
(if R1 == R2, go to EndLoop label)
bne (branch if not eq)
bne reg1, reg2, label
bne R1, R2, EndLoop
(if R1 != R2, go to EndLoop label)
slt (set on less than)
slt destReg, reg1, reg2
slt R3, R1, R2
(set R3 to 1 if R1 < R2)
sltu
sltu destReg, reg1, reg2
sltu R3, R1, R2
(set R3 to 1 if R1 < R2)
slti
slti destReg, reg1, reg2
slti R3, R1, 100
(set R3 to 1 if R1 < R2)
sltiu
sltiu destReg, reg1, reg2
sltiu R3, R1, 100
(set R3 to 1 if R1 < R2)
jr (jump to addr in reg)
jr targetAddrInReg
jr R31
(jump to address in R31)
j (jump to label)
j label
j StartLoop
(go to instruction labelled StartLoop)
jal
jal label
jal StartLoop
(store PC in $ra and go to instruction labelled StartLoop)
K HALT Instruction: Halts Running K Simulator
Name
Format
Example
HALT
HALT (or halt)
HALT
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Central Processing Unit (CPU)