MIPS Assembly ←→ Machine Mappings

(Organized by Functional Category)

Arithmetic Instructions

Name	Format	Layout						Example
		6 bits	5 bits	5 bits	5 bits	5 bits	6 bits
add	R	0	2	3	1	0	32	add $1, $2, $3
addu	R	0	2	3	1	0	33	addu $1, $2, $3
sub	R	0	2	3	1	0	34	sub $1, $2, $3
subu	R	0	2	3	1	0	35	subu $1, $2, $3
addi	I	8	2	1	100			addi $1, $2, 100
addiu	I	9	2	1	100			addiu $1, $2, 100

Logical Instructions

Name	Format	Layout						Example
		6 bits	5 bits	5 bits	5 bits	5 bits	6 bits
and	R	0	2	3	1	0	36	and $1, $2, $3
or	R	0	2	3	1	0	37	or $1, $2, $3
nor	R	0	2	3	1	0	39	nor $1, $2, $3
andi	I	12	2	1	100			andi $1, $2, 100
ori	I	13	2	1	100			ori $1, $2, 100
sll	R	0	0	2	1	10	0	sll $1, $2, 10
srl	R	0	0	2	1	10	2	srl $1, $2, 10

Memory Access and Set Register Instructions

Name	Format	Layout						Example
		6 bits	5 bits	5 bits	5 bits	5 bits	6 bits
lw	I	35	2	1	100			lw $1, 100($2)
sw	I	43	2	1	100			sw $1, 100($2)
lui	I	15	0	1	100			lui $1, 100

Branch-Related Instructions

Name	Format	Layout						Example
		6 bits	5 bits	5 bits	5 bits	5 bits	6 bits
beq	I	4	1	2	25			beq $1, $2, 100
bne	I	5	1	2	25			bne $1, $2, 100
slt	R	0	2	3	1	0	42	slt $1, $2, $3
sltu	R	0	2	3	1	0	43	sltu $1, $2, $3
slti	I	10	2	1	100			slti $1, $2, 100
sltiu	I	11	2	1	100			sltiu $1, $2, 100

Jump Instructions

Name	Format	Layout						Example
		6 bits	5 bits	5 bits	5 bits	5 bits	6 bits
jr	R	0	31	0	0	0	8	jr $31
j	J	2	2500					j 10000
jal	J	3	2500					jal 10000